A common way to asynchronously transmit data over serial links is by impressing a stream of "bits" onto a medium. A character like the letter "A", which is represented by the set of bits "01000001" in the ASCII table, is transmitted as shown in FIG. 1. The set of bits are transmitted least significant bit (LSB) first and is preceded by a start bit. A `1` is represented by a mark or positive level and a `0` is represented by a space. The serial stream is recovered with the help of a pacing clock at the receiver end. The marks and spaces occupy the entire bit period and separate paths are required for full duplex data exchanges.
When the medium is free space and light pulses are used to transmit data, the serial bitstream may appear as illustrated in FIG. 2. In this system, a `1` is represented by the absence of light and a `0` by a short light pulse falling within a given time window. As before, a clock at the receiver is used to recover and stretch the bits so that the recovered bitstream appears like the bitstream illustrated in FIG. 1. For the case illustrated in FIG. 2, since the transmit and receive paths are the same medium, i.e., free space, the transceiver typically shuts down its receiver when transmitting full blocks of bits and refrains from transmitting when receiving blocks of bits. Thus, the system is half duplex since the data communication devices must take turns to transmit through the medium. Bandwidth used by one device is unavailable to the other. It would thus be advantageous to provide a method and a system for full duplex communication where only half duplex communication was originally possible.
Simultaneous bi-directional communication systems are known in the art. U.S. Pat. No. 3,721,763 illustrates two separate unipolar transmitters which transmit pulses of the same polarity are utilized with a two-wire connecting system. Inverting transformers are interposed between the transmitter and the receiver at each end so that the received pulses are inverted for recognition and to avoid interference with positive pulses being simultaneously transmitted at the same end. However, a ground connection is also shown and can be inferred as being a three-wire connection between the transmitter and receiver and this ground connection introduces the possibility of ground loop interference which is most undesirable.
Other illustrative patents showing two-wire simultaneous bi-directional communication are U.S. Pat. Nos. 4,012,590, 4,112,253, and 4,117,277. These patents show alternative approaches to the basic problem but utilize other communication techniques in which the current or voltage levels are compared or differentiated or in which special encoding and decoding operations are conducted to accommodate the bi-directional simultaneous communication.
One of the problems with these systems is the need to provide proper synchronization between transmitting and receiving. U.S. Pat. No. 4,326,287 discloses placing a phase locked loop at each receiver to extract the clocking information from the transmitted signals for synchronizing the return transmission to avoid overlap of pulses and for determining whether a received bit is a 1 or a 0. One problem with phase locked loops is they are relatively complex and expensive. The phase locked loop is usually tuned to a particular frequency and requires retuning when changing baud rates.